A computational study of van der Waals tunnel transistors: Fundamental aspects and design challenges

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dc.contributor.authorCao, Jiang
dc.contributor.authorLogoteta, Demetrio
dc.contributor.authorÖzkaya, Özkaya
dc.contributor.authorBiel, Blanca
dc.contributor.authorCresti, Alessandro
dc.contributor.authorPala, Marco
dc.contributor.authorEsseni, David
dc.date.accessioned13.07.201910:50:10
dc.date.accessioned2019-07-16T08:22:08Z
dc.date.available13.07.201910:50:10
dc.date.available2019-07-16T08:22:08Z
dc.date.issued2015
dc.departmentSabire Yazıcı Fen Edebiyat Fakültesi
dc.descriptionIEEE Electron Devices Society
dc.description61st IEEE International Electron Devices Meeting, IEDM 2015 -- 7 December 2015 through 9 December 2015 -- -- 119534
dc.description.abstractWe propose a model Hamiltonian for van der Waals tunnel transistors relying on a few physical parameters that we calibrate against DFT band structure calculations. This approach allowed us to develop a fully three-dimensional (3-D) NEGF based simulator and to investigate fundamental and design aspects related to van der Waals tunnel transistors, such as: (a) area and edge tunneling components, and scaling with device area; (b) impact of top gate alignment and back-oxide thickness on the device performance; (c) influence of inelastic phonon scattering on the device operation and sub-threshold swing; (d) benchmarking of switching energy and delay. © 2015 IEEE.
dc.identifier.doi10.1109/IEDM.2015.7409684
dc.identifier.endpage12.05.2004en_US
dc.identifier.isbn9781467398930
dc.identifier.issn0163-1918
dc.identifier.scopusqualityQ2
dc.identifier.startpage12.05.2001en_US
dc.identifier.urihttps://dx.doi.org/10.1109/IEDM.2015.7409684
dc.identifier.urihttps://hdl.handle.net/20.500.12451/2473
dc.identifier.volume2016-Februaryen_US
dc.identifier.wosqualityN/A
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers Inc.
dc.relation.ispartofTechnical Digest - International Electron Devices Meeting, IEDM
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanı
dc.rightsinfo:eu-repo/semantics/openAccess
dc.titleA computational study of van der Waals tunnel transistors: Fundamental aspects and design challenges
dc.typeConference Object

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