A computational study of van der Waals tunnel transistors: Fundamental aspects and design challenges
Yükleniyor...
Dosyalar
Tarih
2015
Dergi Başlığı
Dergi ISSN
Cilt Başlığı
Yayıncı
Institute of Electrical and Electronics Engineers Inc.
Erişim Hakkı
info:eu-repo/semantics/openAccess
Özet
We propose a model Hamiltonian for van der Waals tunnel transistors relying on a few physical parameters that we calibrate against DFT band structure calculations. This approach allowed us to develop a fully three-dimensional (3-D) NEGF based simulator and to investigate fundamental and design aspects related to van der Waals tunnel transistors, such as: (a) area and edge tunneling components, and scaling with device area; (b) impact of top gate alignment and back-oxide thickness on the device performance; (c) influence of inelastic phonon scattering on the device operation and sub-threshold swing; (d) benchmarking of switching energy and delay. © 2015 IEEE.
Açıklama
IEEE Electron Devices Society
61st IEEE International Electron Devices Meeting, IEDM 2015 -- 7 December 2015 through 9 December 2015 -- -- 119534
61st IEEE International Electron Devices Meeting, IEDM 2015 -- 7 December 2015 through 9 December 2015 -- -- 119534
Anahtar Kelimeler
Kaynak
Technical Digest - International Electron Devices Meeting, IEDM
WoS Q Değeri
N/A
Scopus Q Değeri
Q2
Cilt
2016-February
